powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3

powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3

When DDR data rate is higher than 1200MT/s or controller interleaving is
enabled, additional cycle for write-to-read turnaround is needed to satisfy
dynamic ODT timing.

Signed-off-by: York Sun <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>